1. Field of the Invention
The present invention relates to a method for forming a film such as depositing a silicon film on a transparent substrate directly or through an insulating film and a method for manufacturing a thin film transistor used as, for example, a drive element of a liquid crystal display panel and electroluminescense.
Such a liquid crystal display panel is used in a thin type liquid crystal television, a lap top personal computer, an information terminal equipment or the like.
2. Description of the Related Art
Thin film transistor (hereinafter referred to as TFTs) are formed using a semiconductor film generally formed on a glass substrate and arranged in a matrix form. In manufacturing, they are formed by a process at such a comparatively low temperature that the glass substrate is not softened.
TFTs include a stagger type, an inverted stagger type or a planar type depending on the difference in the structure thereof.
The stagger type TFT has such a structure that a source electrode and a drain electrode are formed on the substrate side, an active semiconductor layer and an insulating film are formed thereon, and a gate electrode is formed on the insulating film.
Further, the inverted stagger type TFT has a structure that a gate electrode is formed on a substrate side, an insulating film and an active semiconductor layer are grown in consecutive order thereon, and a source electrode and a drain electrode are formed on the active semiconductor layer.
Furthermore, the planar type TFT has such a structure that an active semiconductor layer is grown on a substrate, a gate electrode is formed on the active semiconductor layer through an insulating film, and at the same time, a source layer and a drain layer are formed on both sides of the gate electrode.
The TFT is formed on an inexpensive glass substrate in many cases, and the active semiconductor layer for moving carriers is formed of amorphous silicon or polycrystalline silicon. The polycrystalline silicon is generally grown by a chemical vapor deposition method as described in Japanese Patent Provisional Publication No. 3-165575 for instance, and the amorphous silicon is formed by a similar method at a lower growth temperature.
It is preferred for the active semiconductor layer to have high carrier mobility and a small leakage current in an OFF state, i.e., an OFF-state current, but the amorphous silicon has low carrier mobility and a small leakage current, and the polycrystalline silicon has high carrier mobility and large leakage current on the contrary to the above.
In this case, it is desirable to use polycrystalline silicon having high carrier mobility so as to make the OFF-state current thereof smaller, and a method for reducing an OFF-state current has been proposed in Japanese Patent Provisional Publication No. 2-83939 for instance, as follows.
Namely, when ion implantation of impurities is made at a part making contact with source and drain electrodes in the active semiconductor layer of a stagger type TFT, conditions of injection are set so that the impurity density at the part making contact with the source electrode and the drain electrode is made the highest, and on the other hand, the impurity density is lowered as going toward the inside of the active semiconductor layer therefrom thus, a field emission current which is one of the causes of the OFF-state current is made smaller.
Further, as to a gate insulator of an inverted stagger type TFT, dielectric breakdown and low resistance defective portion caused by a pin hole, a crack or the like are liable to occur since the insulating film is laminated on the gate electrode, which is required to be prevented. As one of the preventive methods, it has been proposed to form the gate insulator by an atomic layer epitaxy method in Japanese Patent Provisional Publication No. 2-246161. Besides, according to the Publication, no description was made on crystal orientation of the gate insulator, but it is only described to form an amorphous silicon film by a plasma CVD method regarding the active semiconductor layer grown on the gate insulator and nothing was stated except the above.
In the prior art, an amorphous silicon thin film or a polycrystalline silicon thin film is accumulated on a top of a glass substrate, which is formed as an active semiconductor layer. The glass substrate itself being amorphous, however, only a very fine crystalline film having a grain size of approximately 50 nm is obtainable even if polycrystalline silicon is formed on the glass substrate directly or through SiO.sub.2 or SiN.
Moreover, there is a problem that the carrier mobility cannot be made sufficiently high according to the TFT using such a silicon thin film. Here, the mobility of polycrystalline silicon formed on the glass substrate is at approximately 10 cm.sup.2 /Vs, and the mobility of amorphous silicon is at approximately 1 cm.sup.2 /Vs.
As against the above, it is conceivable to improve the crystalline property by applying heat treatment at a high temperature after film formation, but there is such a trouble that large deformation is produced on the glass substrate in case a large-sized glass substrate is used when a temperature of the softening point thereof or higher, i.e., a temperature of above 400.degree. C., is applied for many hours.
Further, although it is also being attempted that, after an amorphous silicon thin film or a polycrystalline silicon thin film having fine crystal grains is formed on an insulating substrate, polycrystallization or monocrystallization is proceeded part by part by means of laser annealing so as to have such an operation through all the area (referenced documents: IEEE Transactions on Electron Devices, Vol. 36, No. 9, 1989, pp. 1929-1933), it takes a long time for the process, and it is also difficult to process the whole area uniformly.
Moreover, even if a silicon film having a large grain size could be formed, there is a problem of reduction in the OFF-state current remains unsolved.
In order to solve such a problem, it has been proposed to make such a profile that the impurity density at a part making contact with the source and drain electrode reaches the maximum when ion implantation of impurities into the active semiconductor layer is performed.
However, it is not easy to set conditions of ion implantation for obtaining such an impurity profile and desired impurity density, and in addition, such a complicated process to provide a film for controlling an impurity profile on the active semiconductor layer has to be performed.